RISC-V Workshop in Chennai, India, hosted by The Indian Institute of Technology Madras (IIT Madras), achieved a significant milestone by booting Linux on its first ever RISC-V based silicon chip processor named Shakti . The team, which is sponsored by the Western Digital, aims to create a critical mass of CPU architects in India, according to the project lead. Open-Source, patent-free domestic CPU production is well on the cards, according to experts.
For those of you who are not familiar, RISC-V is an open ISA (Instruction Set Architecture) developed as a project in 2010 by the University of California, Berkeley. First of all, an instruction set is merely the set of commands given to a CPU in machine language. Basically, it tells the CPU what it needs to do like, for example, add or compare.
Due to their lower power consumption, ARM (Advanced RISC Machine) instruction set-based chips have dominated smartphone, tablets and other small device markets. Shakti is The RISC-V based processor that has been designed with small, speed, and low-power consumption in mind.
Currently clocking at 400MHz, DMIPS/MHz – 1.67, this isn’t by any means outclassing raspberry Pi performance (nor does it intend to). It is a test chip taped-out on Intel’s 22nm FinFET Technology. Furthermore, the fact that Linux was able to boot presents a proof of concept of design by which the project team could further move towards more production-grade SoC designs.
According to industry analysts, RISC-V based chips such as Shakti could be major players in IoT, and AI with an extensive ecosystem is in place.
Submitted by: Arnfried Walbrecht